//! RV64 A-extension and fence encoding checks.

use std::testing;

use std::lang::alloc;

use std::lang::strings;

use super::atomics;

use super::encode;

use super::decode;

use super::asm;

/// Assembler workspace for individual atomic instruction fixtures.

static MEMORY: [u8; 65536] = [0; 65536];

/// Interned fixture names.

unsafe static STRINGS: strings::Pool = strings::Pool { table: undefined, count: 0 };

/// Output storage for one assembled instruction.

static WORDS: [u32; 1] = [0; 1];

/// Exact unordered word encodings for a0, a1, and a2 operands.

@test fn encodings() throws (testing::TestError) {

    let operations: [u32; 11] = [0, 1, 2, 3, 4, 8, 12, 16, 20, 24, 28];

    let words: [u32; 11] = [

        0x00c5a52f, 0x08c5a52f, 0x1005a52f, 0x18c5a52f, 0x20c5a52f,

        0x40c5a52f, 0x60c5a52f, 0x80c5a52f, 0xa0c5a52f, 0xc0c5a52f, 0xe0c5a52f,

    ];

    for operation, i in &operations[..] {

        for wide in 0..2 {

            for order in 0..4 {

                let item = atomics::Instruction {

                    format: atomics::Format { operation, width: 2 + wide, order },

                    rd: super::A0, rs1: super::A1, rs2: super::ZERO if operation == 2 else super::A2,

                };

                let word = words[i] | (wide << 12) | (order << 25);

                try testing::expect(atomics::encode(item) == word);

                let decoded = atomics::decode(word) else { throw testing::TestError::Failed; };

                try testing::expect(decoded == item);

                let case decode::Instr::Atomic(instruction) = decode::decode(word) else { throw testing::TestError::Failed; };

                try testing::expect(instruction == item);

            }

        }

    }

}

/// Reject reserved opcodes, widths, LR sources, and malformed suffixes.

@test fn invalid() throws (testing::TestError) {

    for word in &[0x2805a52f, 0x00c5852f, 0x10c5a52f, 0x00c5a513] {

        try testing::expect(atomics::decode(word) == nil);

    }

    for name in &["lr", "lr.q", "lr.w.aq.rl", "sc.d.rl.aq", "amoswap.d.bad", "amoadd.wextra"] {

        try testing::expect(atomics::parse(name) == nil);

    }

    let format = atomics::parse("amoswap.d.aqrl") else { throw testing::TestError::Failed; };

    try testing::expect(format.operation == 1 and format.width == 3 and format.order == 3);

}

/// Assemble one instruction and return its exact word.

unsafe fn assemble(source: *[u8]) -> u32 throws (testing::TestError) {

    let mut arena = alloc::new(&mut MEMORY[..]);

    let words = &mut WORDS[..];

    let data: *mut [u8] = &mut [];

    let result = try asm::assemble(asm::scanner::SourceKind::String, source,

        &mut words[..], &mut data[..], &mut arena, &mut STRINGS, 0)

        catch { throw testing::TestError::Failed; };

    try testing::expect(result.text.len == 1);

    return result.text[0];

}

/// Check instruction suffix scanning and assembler operand order.

@test unsafe fn assembly() throws (testing::TestError) {

    try testing::expect((try assemble("amoadd.d.aqrl %a0 %a2 (%a1);")) == 0x06c5b52f);

    try testing::expect((try assemble("amoswap.w.aq %a0 %a2 0(%a1);")) == 0x0cc5a52f);

    try testing::expect((try assemble("lr.d.aq %a0 (%a1);")) == 0x1405b52f);

    try testing::expect((try assemble("sc.w.rl %a0 %a2 (%a1);")) == 0x1ac5a52f);

    try testing::expect((try assemble("fence.i;")) == 0x0000100f);

    try testing::expect((try assemble("fence iorw iorw;")) == 0x0ff0000f);

    try testing::expect((try assemble("fence r rw;")) == 0x0230000f);

    try testing::expect((try assemble("fence rw w;")) == 0x0310000f);

    try testing::expect((try assemble("fence 0 0;")) == 0x0000000f);

}

/// Decode fence classes and local instruction synchronization.

@test fn fences() throws (testing::TestError) {

    try testing::expect(encode::fenceI() == 0x0000100f);

    try testing::expect(decode::decode(encode::fenceI()) == decode::Instr::FenceI);

    let case decode::Instr::Fence { predecessor, successor } = decode::decode(encode::fenceOrder(15, 15))

        else { throw testing::TestError::Failed; };

    try testing::expect(predecessor == 15 and successor == 15);

    let case decode::Instr::Unknown { .. } = decode::decode(0x0000200f)

        else { throw testing::TestError::Failed; };

}

/// Reject invalid atomic operands and fence access classes.

@test unsafe fn invalidAssembly() throws (testing::TestError) {

    for source in &[

        "lr.w %a0 %a2 (%a1);", "sc.d %a0 %a2 8(%a1);",

        "amoadd.d.aq.aq %a0 %a2 (%a1);", "fence rr rw;", "fence rx rw;",

        "fence 1 rw;", "fence.i %a0;",

    ] {

        let mut arena = alloc::new(&mut MEMORY[..]);

        let words = &mut WORDS[..];

        let data: *mut [u8] = &mut [];

        let mut rejected = false;

        try asm::assemble(asm::scanner::SourceKind::String, source,

            &mut words[..], &mut data[..], &mut arena, &mut STRINGS, 0) catch {

            set rejected = true;

        };

        try testing::expect(rejected);

    }

}