#ifndef OP_DEBUG_H
#define OP_DEBUG_H

#include <stdio.h>

#include "../riscv.h"
#include "../types.h"

/* Maximum length of a component string (op, reg, imm). */
#define MAX_PART_LEN      16
/* Maximum length of an instruction string, including colors. */
#define MAX_INSTR_STR_LEN 96
/* Length of an instruction string, without colors. */
#define INSTR_STR_LEN     24

/* Structure for representing a decoded RISC-V instruction's components.
 * All components are stored as strings to allow for syntax highlighting. */
struct instrparts {
    /* Operation name (e.g., "add", "lw", "beq") */
    char op[MAX_PART_LEN];
    /* Destination register (e.g., "a0", "t0") */
    char rd[MAX_PART_LEN];
    /* Source register 1 (e.g., "a1", "t1") */
    char rs1[MAX_PART_LEN];
    /* Source register 2 (e.g., "a2", "t2") */
    char rs2[MAX_PART_LEN];
    /* Immediate value as string (e.g., "42", "-8") */
    char imm[MAX_PART_LEN];
    /* Memory offset (e.g., "8" in "lw t0, 8(sp)") */
    char off[MAX_PART_LEN];
    /* For memory operations, base register (e.g., "sp" in "lw t0, 8(sp)") */
    char base[MAX_PART_LEN];
    /* Type of the instruction (R, I, S, B, U, J) */
    char type;
    /* Whether the instruction is a pseudo-instruction (e.g., mv, li, ret) */
    bool is_pseudo;
};

/**
 * Convert an instruction to a human-readable RISC-V assembly string.
 */
i32 sprint_instr(instr_t instr, char *str, bool color);

/**
 * Prints a human-readable RISC-V assembly representation of the instruction to
 * the given stream.
 */
void print_instr(
    instr_t instr, FILE *stream, const char *comment, bool color, i32 indent
);

/**
 * Prints human-readable RISC-V assembly representations of multiple
 * instructions to the given stream.
 */
void print_instrs(
    instr_t *instrs, usize count, FILE *stream, const char *comment
);

#endif /* OP_DEBUG_H */